Find below five of the publications. For the full list and details of the publications write to firstname.lastname@example.org
1. Evaluation of multiclass support vector machine classifiers using optimum threshold-based pruning technique. Authors: J. Manikandan, B.Venkataramani; Publication: IET Signal Processing, Issue: Sept. 2010
Support vector machine (SVM) is the state-of-the-art classifier used in real world pattern recognition applications. Based on this study, it is found that the application of OT technique reduces the minimum time required for recognition by a factor of 1.54 and 1.31, respectively, for speaker dependent and multi speaker-dependent cases. The proposed approach is also applicable for other SVM-based multiclass pattern recognition systems such as target recognition, fingerprint classification, character recognition and face recognition.
2. Digital Circuit Design using Support Vector Machines. Authors: J.Manikandan and V.K.Agrawal; Publication: 2014 Fourth International Conference on Communication Systems and Network Technologies.
In this paper, a novel attempt is made to study, assess and design digital circuits using two-class and multi class support vector machine classifiers. It is reported in literature that computational complexity and the classification time for SVM classifier depends on the number of support vectors required for classification. In order to reduce the number of support vectors, an optimum threshold technique based SVM classifier is employed for thedesign of digital circuits and it is observed that a maximum of 87.5% of total support vectors are pruned on using the technique.
3. Support System-on-programmable-chip implementation of diminishing learning based pattern recognition system. Authors: J. Manikandan B. Venkataramani, Publication: International Journal of Machine Learning and Cybernetics Issue: Aug 2013
In this paper, the computational complexity for SVM and SVM-DL based isolated digit recognition system is studied and the computation time for both the classifiers is evaluated by system-on-programmable-chip (SOPC) implementation of the recognition system onto an Altera Cyclone II Series FPGA using Nios II Soft-core processor.
4. Chapter: Design of a Biometric Security System Using Support Vector Machine Classifier. Authors: Manikandan J., Agrawal V. K; Book Title: Intelligent Computing, Networking, and Informatics.
In this chapter, design of a SVM-based biometric security system using speech and face as inputs are discussed. Details about the performance of the proposed system for speech and face recognition are reported in this paper. The proposed biometric system as well as approaches can be extended for fingerprint and iris recognition too.
5. Chapter: Design and Evaluation of N-Module Reconfigurable Systems. Authors: Kunal Parikh, J. Manikandan and V. K. Agrawal; Book Title: Intelligent Computing, Networking, and Informatics.
In this chapter, different approaches of designing a reconfigurable system on Virtex-5 FPGA are discussed. In order to assess the significance of reconfigurable systems, three sets of N-module reconfigurable system are proposed and their performance results are reported in this paper.